| CWE-1251 |
The product's architecture mirrors regions without ensuring that their contents always stay in sync. |
| CWE-1252 |
The CPU is not configured to provide hardware support for exclusivity of write and execute operations on memory. This allows an attacker to execute data from all of memory. |
| CWE-1253 |
The logic used to determine system-security state for the product relies on values sensed from the fuses, but it relies on 'negative' logic for an un-blown fuse. |
| CWE-1254 |
The product's comparison logic is performed over a series of steps rather than across the entire string in one operation. If there is a comparison logic failure on one of these steps, the operation may be vulnerable to a timing attack that can result in the interception of the process for nefarious purposes. |
| CWE-1256 |
Software-controllable device functionality such as power and clock management permits unauthorized corruption of bits. |
| CWE-1257 |
Aliased or mirrored memory regions in hardware designs
may have inconsistent read/write permissions enforced by hardware.
In this way, it could be possible that an untrusted agent is blocked from
accessing a memory region but is not blocked from accessing the
corresponding aliased memory region.
|
| CWE-1258 |
The hardware does not fully clear security-sensitive values, such as keys and intermediate values in cryptographic operations, when debug mode is entered. |
| CWE-1259 |
The product implements a Security Identifier mechanism to differentiate what actions are allowed or disallowed when a transaction originates from an entity. However, the Security Identifiers are improperly protected. |
| CWE-126 |
The software reads from a buffer using buffer access mechanisms such as indexes or pointers that reference memory locations after the targeted buffer. |
| CWE-1260 |
The product allows address regions to overlap, which can result in the bypassing of intended memory protection. |
