| ID | CVE-2022-33745 | ||||||
| Sažetak | insufficient TLB flush for x86 PV guests in shadow mode For migration as well as to work around kernels unaware of L1TF (see XSA-273), PV guests may be run in shadow paging mode. To address XSA-401, code was moved inside a function in Xen. This code movement missed a variable changing meaning / value between old and new code positions. The now wrong use of the variable did lead to a wrong TLB flush condition, omitting flushes where such are necessary. | ||||||
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| CVSS vektor | CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H | ||||||
| Zadnje važnije ažuriranje | 07-11-2023 - 03:48 | ||||||
| Objavljeno | 26-07-2022 - 13:15 |
